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[讨论] chisel中val/var,=和:=

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发表于 2021-8-10 16:15:31 | 显示全部楼层 |阅读模式
1)
import chisel3._
class FullAdder extends Module {
  val io = IO(new Bundle {
    val a = Input(UInt(1.W))
        val b = Input(UInt(1.W))
        val cin = Input(UInt(1.W))
        val sum = Output(UInt(1.W))
        val cout = Output(UInt(1.W))
  })
  val a_xor_b = io.a ^ io.b
  io.sum := a_xor_b ^ io.cin
  //上面代码产生sum
  //下面代码产生进位
  val a_and_b = io.a & io.b
  val b_and_cin = io.b & io.cin
  val a_and_cin = io.a & io_cin
  io.cout := a_and_b | b_and_cin | a_and_cin
}
上面代码是OK,下面代码:
2)
class FullAdder extends Module {
  val io = IO(new Bundle {
    val a = Input(UInt(1.W))
        val b = Input(UInt(1.W))
        val cin = Input(UInt(1.W))
        val sum = Output(UInt(1.W))
        val cout = Output(UInt(1.W))
  })
  val a_xor_b = io.a ^ io.b
io.sum = a_xor_b ^ io.cin
  //上面代码产生sum
  //下面代码产生进位
  val a_and_b = io.a & io.b
  val b_and_cin = io.b & io.cin
  val a_and_cin = io.a & io_cin
  io.cout := a_and_b | b_and_cin | a_and_cin
}
则语法错误,那下面代码:
3)
class FullAdder extends Module {
  val io = IO(new Bundle {
    val a = Input(UInt(1.W))
        val b = Input(UInt(1.W))
        val cin = Input(UInt(1.W))
        var sum = Output(UInt(1.W))
        val cout = Output(UInt(1.W))
  })
  val a_xor_b = io.a ^ io.b
  io.sum := a_xor_b ^ io.cin
  //上面代码产生sum
  //下面代码产生进位
  val a_and_b = io.a & io.b
  val b_and_cin = io.b & io.cin
  val a_and_cin = io.a & io_cin
  io.cout := a_and_b | b_and_cin | a_and_cin
}
则也OK,但与1)相比较有什么不同?
4)
class FullAdder extends Module {
  val io = IO(new Bundle {
    val a = Input(UInt(1.W))
        val b = Input(UInt(1.W))
        val cin = Input(UInt(1.W))
        var sum = Output(UInt(1.W))
        val cout = Output(UInt(1.W))
  })
  val a_xor_b = io.a ^ io.b
  io.sum = a_xor_b ^ io.cin
  //上面代码产生sum
  //下面代码产生进位
  val a_and_b = io.a & io.b
  val b_and_cin = io.b & io.cin
  val a_and_cin = io.a & io_cin
  io.cout := a_and_b | b_and_cin | a_and_cin
}
代码和3)比较起来又有什么不同?

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 楼主| 发表于 2021-8-12 15:15:28 | 显示全部楼层
针对上面,做几个实验,实验一:
代码是:
val sum = Output(UInt(1.W))
io.sum := a_xor_b ^ io.cin
时的.fir和verilog代码分别如下:
;buildInfoPackage: chisel3, version: 3.1.2, scalaVersion: 2.11.12, sbtVersion: 1.1.1, builtAtString: 2018-07-25 16:52:17.431, builtAtMillis: 1532537537431
circuit Adder :
  module FullAdder :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_1 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_2 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_3 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_4 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_5 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_6 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_7 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module Adder :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip A : UInt<8>, flip B : UInt<8>, flip Cin : UInt<1>, Sum : UInt<8>, Cout : UInt<1>}

    inst FullAdder of FullAdder @[Adder.scala 18:35]
    FullAdder.clock <= clock
    FullAdder.reset <= reset
    inst FullAdder_1 of FullAdder_1 @[Adder.scala 18:35]
    FullAdder_1.clock <= clock
    FullAdder_1.reset <= reset
    inst FullAdder_2 of FullAdder_2 @[Adder.scala 18:35]
    FullAdder_2.clock <= clock
    FullAdder_2.reset <= reset
    inst FullAdder_3 of FullAdder_3 @[Adder.scala 18:35]
    FullAdder_3.clock <= clock
    FullAdder_3.reset <= reset
    inst FullAdder_4 of FullAdder_4 @[Adder.scala 18:35]
    FullAdder_4.clock <= clock
    FullAdder_4.reset <= reset
    inst FullAdder_5 of FullAdder_5 @[Adder.scala 18:35]
    FullAdder_5.clock <= clock
    FullAdder_5.reset <= reset
    inst FullAdder_6 of FullAdder_6 @[Adder.scala 18:35]
    FullAdder_6.clock <= clock
    FullAdder_6.reset <= reset
    inst FullAdder_7 of FullAdder_7 @[Adder.scala 18:35]
    FullAdder_7.clock <= clock
    FullAdder_7.reset <= reset
    wire carry : UInt<1>[9] @[Adder.scala 19:19]
    wire sum : UInt<1>[8] @[Adder.scala 20:19]
    carry[0] <= io.Cin @[Adder.scala 23:12]
    node _T_42 = bits(io.A, 0, 0) @[Adder.scala 27:21]
    FullAdder.io.a <= _T_42 @[Adder.scala 27:14]
    node _T_43 = bits(io.B, 0, 0) @[Adder.scala 28:21]
    FullAdder.io.b <= _T_43 @[Adder.scala 28:14]
    FullAdder.io.cin <= carry[0] @[Adder.scala 29:16]
    carry[1] <= FullAdder.io.cout @[Adder.scala 30:16]
    node _T_44 = bits(FullAdder.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[0] <= _T_44 @[Adder.scala 31:12]
    node _T_45 = bits(io.A, 1, 1) @[Adder.scala 27:21]
    FullAdder_1.io.a <= _T_45 @[Adder.scala 27:14]
    node _T_46 = bits(io.B, 1, 1) @[Adder.scala 28:21]
    FullAdder_1.io.b <= _T_46 @[Adder.scala 28:14]
    FullAdder_1.io.cin <= carry[1] @[Adder.scala 29:16]
    carry[2] <= FullAdder_1.io.cout @[Adder.scala 30:16]
    node _T_47 = bits(FullAdder_1.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[1] <= _T_47 @[Adder.scala 31:12]
    node _T_48 = bits(io.A, 2, 2) @[Adder.scala 27:21]
    FullAdder_2.io.a <= _T_48 @[Adder.scala 27:14]
    node _T_49 = bits(io.B, 2, 2) @[Adder.scala 28:21]
    FullAdder_2.io.b <= _T_49 @[Adder.scala 28:14]
    FullAdder_2.io.cin <= carry[2] @[Adder.scala 29:16]
    carry[3] <= FullAdder_2.io.cout @[Adder.scala 30:16]
    node _T_50 = bits(FullAdder_2.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[2] <= _T_50 @[Adder.scala 31:12]
    node _T_51 = bits(io.A, 3, 3) @[Adder.scala 27:21]
    FullAdder_3.io.a <= _T_51 @[Adder.scala 27:14]
    node _T_52 = bits(io.B, 3, 3) @[Adder.scala 28:21]
    FullAdder_3.io.b <= _T_52 @[Adder.scala 28:14]
    FullAdder_3.io.cin <= carry[3] @[Adder.scala 29:16]
    carry[4] <= FullAdder_3.io.cout @[Adder.scala 30:16]
    node _T_53 = bits(FullAdder_3.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[3] <= _T_53 @[Adder.scala 31:12]
    node _T_54 = bits(io.A, 4, 4) @[Adder.scala 27:21]
    FullAdder_4.io.a <= _T_54 @[Adder.scala 27:14]
    node _T_55 = bits(io.B, 4, 4) @[Adder.scala 28:21]
    FullAdder_4.io.b <= _T_55 @[Adder.scala 28:14]
    FullAdder_4.io.cin <= carry[4] @[Adder.scala 29:16]
    carry[5] <= FullAdder_4.io.cout @[Adder.scala 30:16]
    node _T_56 = bits(FullAdder_4.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[4] <= _T_56 @[Adder.scala 31:12]
    node _T_57 = bits(io.A, 5, 5) @[Adder.scala 27:21]
    FullAdder_5.io.a <= _T_57 @[Adder.scala 27:14]
    node _T_58 = bits(io.B, 5, 5) @[Adder.scala 28:21]
    FullAdder_5.io.b <= _T_58 @[Adder.scala 28:14]
    FullAdder_5.io.cin <= carry[5] @[Adder.scala 29:16]
    carry[6] <= FullAdder_5.io.cout @[Adder.scala 30:16]
    node _T_59 = bits(FullAdder_5.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[5] <= _T_59 @[Adder.scala 31:12]
    node _T_60 = bits(io.A, 6, 6) @[Adder.scala 27:21]
    FullAdder_6.io.a <= _T_60 @[Adder.scala 27:14]
    node _T_61 = bits(io.B, 6, 6) @[Adder.scala 28:21]
    FullAdder_6.io.b <= _T_61 @[Adder.scala 28:14]
    FullAdder_6.io.cin <= carry[6] @[Adder.scala 29:16]
    carry[7] <= FullAdder_6.io.cout @[Adder.scala 30:16]
    node _T_62 = bits(FullAdder_6.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[6] <= _T_62 @[Adder.scala 31:12]
    node _T_63 = bits(io.A, 7, 7) @[Adder.scala 27:21]
    FullAdder_7.io.a <= _T_63 @[Adder.scala 27:14]
    node _T_64 = bits(io.B, 7, 7) @[Adder.scala 28:21]
    FullAdder_7.io.b <= _T_64 @[Adder.scala 28:14]
    FullAdder_7.io.cin <= carry[7] @[Adder.scala 29:16]
    carry[8] <= FullAdder_7.io.cout @[Adder.scala 30:16]
    node _T_65 = bits(FullAdder_7.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[7] <= _T_65 @[Adder.scala 31:12]
    node _T_66 = cat(sum[1], sum[0]) @[Adder.scala 33:17]
    node _T_67 = cat(sum[3], sum[2]) @[Adder.scala 33:17]
    node _T_68 = cat(_T_67, _T_66) @[Adder.scala 33:17]
    node _T_69 = cat(sum[5], sum[4]) @[Adder.scala 33:17]
    node _T_70 = cat(sum[7], sum[6]) @[Adder.scala 33:17]
    node _T_71 = cat(_T_70, _T_69) @[Adder.scala 33:17]
    node _T_72 = cat(_T_71, _T_68) @[Adder.scala 33:17]
    io.Sum <= _T_72 @[Adder.scala 33:10]
    io.Cout <= carry[8] @[Adder.scala 34:11]

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 楼主| 发表于 2021-8-12 15:16:05 | 显示全部楼层
module FullAdder( // @[3.2]
  input   io_a, // @[6.4]
  input   io_b, // @[6.4]
  input   io_cin, // @[6.4]
  output  io_sum, // @[6.4]
  output  io_cout // @[6.4]
);
  wire  a_xor_b; // @[FullAdder.scala 12:228.4]
  wire  a_and_b; // @[FullAdder.scala 18:2211.4]
  wire  b_and_cin; // @[FullAdder.scala 19:2412.4]
  wire  a_and_cin; // @[FullAdder.scala 20:2413.4]
  wire  _T_16; // @[FullAdder.scala 21:22:@14.4]
  assign a_xor_b = io_a ^ io_b; // @[FullAdder.scala 12:22:@8.4]
  assign a_and_b = io_a & io_b; // @[FullAdder.scala 18:22:@11.4]
  assign b_and_cin = io_b & io_cin; // @[FullAdder.scala 19:24:@12.4]
  assign a_and_cin = io_a & io_cin; // @[FullAdder.scala 20:24:@13.4]
  assign _T_16 = a_and_b | b_and_cin; // @[FullAdder.scala 21:22:@14.4]
  assign io_sum = a_xor_b ^ io_cin; // @[FullAdder.scala 13:10:@10.4]
  assign io_cout = _T_16 | a_and_cin; // @[FullAdder.scala 21:11:@16.4]
endmodule
module Adder( // @[:@123.2]
  input        clock, // @[:@124.4]
  input        reset, // @[:@125.4]
  input  [7:0] io_A, // @[:@126.4]
  input  [7:0] io_B, // @[:@126.4]
  input        io_Cin, // @[:@126.4]
  output [7:0] io_Sum, // @[:@126.4]
  output       io_Cout // @[:@126.4]
);
  wire  FullAdder_io_a; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_io_b; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_io_cin; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_io_sum; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_io_cout; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_1_io_a; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_1_io_b; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_1_io_cin; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_1_io_sum; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_1_io_cout; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_2_io_a; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_2_io_b; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_2_io_cin; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_2_io_sum; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_2_io_cout; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_3_io_a; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_3_io_b; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_3_io_cin; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_3_io_sum; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_3_io_cout; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_4_io_a; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_4_io_b; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_4_io_cin; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_4_io_sum; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_4_io_cout; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_5_io_a; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_5_io_b; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_5_io_cin; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_5_io_sum; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_5_io_cout; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_6_io_a; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_6_io_b; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_6_io_cin; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_6_io_sum; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_6_io_cout; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_7_io_a; // @[Adder.scala 18:35:@149.4]
  wire  FullAdder_7_io_b; // @[Adder.scala 18:35:@149.4]
  wire  FullAdder_7_io_cin; // @[Adder.scala 18:35:@149.4]
  wire  FullAdder_7_io_sum; // @[Adder.scala 18:35:@149.4]
  wire  FullAdder_7_io_cout; // @[Adder.scala 18:35:@149.4]
  wire  sum_0; // @[Adder.scala 31:32:@161.4]
  wire  sum_1; // @[Adder.scala 31:32:@169.4]
  wire  sum_2; // @[Adder.scala 31:32:@177.4]
  wire  sum_3; // @[Adder.scala 31:32:@185.4]
  wire  sum_4; // @[Adder.scala 31:32:@193.4]
  wire  sum_5; // @[Adder.scala 31:32:@201.4]
  wire  sum_6; // @[Adder.scala 31:32:@209.4]
  wire  sum_7; // @[Adder.scala 31:32:@217.4]
  wire [1:0] _T_66; // @[Adder.scala 33:17:@219.4]
  wire [1:0] _T_67; // @[Adder.scala 33:17:@220.4]
  wire [3:0] _T_68; // @[Adder.scala 33:17:@221.4]
  wire [1:0] _T_69; // @[Adder.scala 33:17:@222.4]
  wire [1:0] _T_70; // @[Adder.scala 33:17:@223.4]
  wire [3:0] _T_71; // @[Adder.scala 33:17:@224.4]
  FullAdder FullAdder ( // @[Adder.scala 18:35:@128.4]
    .io_a(FullAdder_io_a),
    .io_b(FullAdder_io_b),
    .io_cin(FullAdder_io_cin),
    .io_sum(FullAdder_io_sum),
    .io_cout(FullAdder_io_cout)
  );
  FullAdder FullAdder_1 ( // @[Adder.scala 18:35:@131.4]
    .io_a(FullAdder_1_io_a),
    .io_b(FullAdder_1_io_b),
    .io_cin(FullAdder_1_io_cin),
    .io_sum(FullAdder_1_io_sum),
    .io_cout(FullAdder_1_io_cout)
  );
  FullAdder FullAdder_2 ( // @[Adder.scala 18:35:@134.4]
    .io_a(FullAdder_2_io_a),
    .io_b(FullAdder_2_io_b),
    .io_cin(FullAdder_2_io_cin),
    .io_sum(FullAdder_2_io_sum),
    .io_cout(FullAdder_2_io_cout)
  );
  FullAdder FullAdder_3 ( // @[Adder.scala 18:35:@137.4]
    .io_a(FullAdder_3_io_a),
    .io_b(FullAdder_3_io_b),
    .io_cin(FullAdder_3_io_cin),
    .io_sum(FullAdder_3_io_sum),
    .io_cout(FullAdder_3_io_cout)
  );
  FullAdder FullAdder_4 ( // @[Adder.scala 18:35:@140.4]
    .io_a(FullAdder_4_io_a),
    .io_b(FullAdder_4_io_b),
    .io_cin(FullAdder_4_io_cin),
    .io_sum(FullAdder_4_io_sum),
    .io_cout(FullAdder_4_io_cout)
  );
  FullAdder FullAdder_5 ( // @[Adder.scala 18:35:@143.4]
    .io_a(FullAdder_5_io_a),
    .io_b(FullAdder_5_io_b),
    .io_cin(FullAdder_5_io_cin),
    .io_sum(FullAdder_5_io_sum),
    .io_cout(FullAdder_5_io_cout)
  );
  FullAdder FullAdder_6 ( // @[Adder.scala 18:35:@146.4]
    .io_a(FullAdder_6_io_a),
    .io_b(FullAdder_6_io_b),
    .io_cin(FullAdder_6_io_cin),
    .io_sum(FullAdder_6_io_sum),
    .io_cout(FullAdder_6_io_cout)
  );
  FullAdder FullAdder_7 ( // @[Adder.scala 18:35:@149.4]
    .io_a(FullAdder_7_io_a),
    .io_b(FullAdder_7_io_b),
    .io_cin(FullAdder_7_io_cin),
    .io_sum(FullAdder_7_io_sum),
    .io_cout(FullAdder_7_io_cout)
  );
  assign sum_0 = FullAdder_io_sum; // @[Adder.scala 31:32:@161.4]
  assign sum_1 = FullAdder_1_io_sum; // @[Adder.scala 31:32:@169.4]
  assign sum_2 = FullAdder_2_io_sum; // @[Adder.scala 31:32:@177.4]
  assign sum_3 = FullAdder_3_io_sum; // @[Adder.scala 31:32:@185.4]
  assign sum_4 = FullAdder_4_io_sum; // @[Adder.scala 31:32:@193.4]
  assign sum_5 = FullAdder_5_io_sum; // @[Adder.scala 31:32:@201.4]
  assign sum_6 = FullAdder_6_io_sum; // @[Adder.scala 31:32:@209.4]
  assign sum_7 = FullAdder_7_io_sum; // @[Adder.scala 31:32:@217.4]
  assign _T_66 = {sum_1,sum_0}; // @[Adder.scala 33:17:@219.4]
  assign _T_67 = {sum_3,sum_2}; // @[Adder.scala 33:17:@220.4]
  assign _T_68 = {_T_67,_T_66}; // @[Adder.scala 33:17:@221.4]
  assign _T_69 = {sum_5,sum_4}; // @[Adder.scala 33:17:@222.4]
  assign _T_70 = {sum_7,sum_6}; // @[Adder.scala 33:17:@223.4]
  assign _T_71 = {_T_70,_T_69}; // @[Adder.scala 33:17:@224.4]
  assign io_Sum = {_T_71,_T_68}; // @[Adder.scala 33:10:@226.4]
  assign io_Cout = FullAdder_7_io_cout; // @[Adder.scala 34:11:@227.4]
  assign FullAdder_io_a = io_A[0]; // @[Adder.scala 27:14:@156.4]
  assign FullAdder_io_b = io_B[0]; // @[Adder.scala 28:14:@158.4]
  assign FullAdder_io_cin = io_Cin; // @[Adder.scala 29:16:@159.4]
  assign FullAdder_1_io_a = io_A[1]; // @[Adder.scala 27:14:@164.4]
  assign FullAdder_1_io_b = io_B[1]; // @[Adder.scala 28:14:@166.4]
  assign FullAdder_1_io_cin = FullAdder_io_cout; // @[Adder.scala 29:16:@167.4]
  assign FullAdder_2_io_a = io_A[2]; // @[Adder.scala 27:14:@172.4]
  assign FullAdder_2_io_b = io_B[2]; // @[Adder.scala 28:14:@174.4]
  assign FullAdder_2_io_cin = FullAdder_1_io_cout; // @[Adder.scala 29:16:@175.4]
  assign FullAdder_3_io_a = io_A[3]; // @[Adder.scala 27:14:@180.4]
  assign FullAdder_3_io_b = io_B[3]; // @[Adder.scala 28:14:@182.4]
  assign FullAdder_3_io_cin = FullAdder_2_io_cout; // @[Adder.scala 29:16:@183.4]
  assign FullAdder_4_io_a = io_A[4]; // @[Adder.scala 27:14:@188.4]
  assign FullAdder_4_io_b = io_B[4]; // @[Adder.scala 28:14:@190.4]
  assign FullAdder_4_io_cin = FullAdder_3_io_cout; // @[Adder.scala 29:16:@191.4]
  assign FullAdder_5_io_a = io_A[5]; // @[Adder.scala 27:14:@196.4]
  assign FullAdder_5_io_b = io_B[5]; // @[Adder.scala 28:14:@198.4]
  assign FullAdder_5_io_cin = FullAdder_4_io_cout; // @[Adder.scala 29:16:@199.4]
  assign FullAdder_6_io_a = io_A[6]; // @[Adder.scala 27:14:@204.4]
  assign FullAdder_6_io_b = io_B[6]; // @[Adder.scala 28:14:@206.4]
  assign FullAdder_6_io_cin = FullAdder_5_io_cout; // @[Adder.scala 29:16:@207.4]
  assign FullAdder_7_io_a = io_A[7]; // @[Adder.scala 27:14:@212.4]
  assign FullAdder_7_io_b = io_B[7]; // @[Adder.scala 28:14:@214.4]
  assign FullAdder_7_io_cin = FullAdder_6_io_cout; // @[Adder.scala 29:16:@215.4]
endmodule

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 楼主| 发表于 2021-8-12 15:16:54 | 显示全部楼层
实验二:
如果是
var sum = Output(UInt(1.W))
io.sum = a_xor_b ^ io.cin
则编译能成功,能产生.fir文件(见下面),但run或debug则出现:
firrtl.passes.CheckChirrtl$UndeclaredReferenceException:  @[Adder.scala 31:32153.4]: [module Adder] Reference _T_15 is not declared
因为出现错误,当然也不会产生verilog文件了
通过上句错误提示结合下面.fir文件内容和FullAdder.scala源代码可知就是io.sum = a_xor_b ^ io.cin这句有问题?为什么呢????
.fir文件内容如下:
;buildInfoPackage: chisel3, version: 3.1.2, scalaVersion: 2.11.12, sbtVersion: 1.1.1, builtAtString: 2018-07-25 16:52:17.431, builtAtMillis: 1532537537431
circuit Adder :
  module FullAdder :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:20]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_1 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:20]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_2 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:20]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_3 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:20]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_4 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:20]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_5 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:20]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_6 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:20]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_7 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:20]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module Adder :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip A : UInt<8>, flip B : UInt<8>, flip Cin : UInt<1>, Sum : UInt<8>, Cout : UInt<1>}

    inst FullAdder of FullAdder @[Adder.scala 18:35]
    FullAdder.clock <= clock
    FullAdder.reset <= reset
    inst FullAdder_1 of FullAdder_1 @[Adder.scala 18:35]
    FullAdder_1.clock <= clock
    FullAdder_1.reset <= reset
    inst FullAdder_2 of FullAdder_2 @[Adder.scala 18:35]
    FullAdder_2.clock <= clock
    FullAdder_2.reset <= reset
    inst FullAdder_3 of FullAdder_3 @[Adder.scala 18:35]
    FullAdder_3.clock <= clock
    FullAdder_3.reset <= reset
    inst FullAdder_4 of FullAdder_4 @[Adder.scala 18:35]
    FullAdder_4.clock <= clock
    FullAdder_4.reset <= reset
    inst FullAdder_5 of FullAdder_5 @[Adder.scala 18:35]
    FullAdder_5.clock <= clock
    FullAdder_5.reset <= reset
    inst FullAdder_6 of FullAdder_6 @[Adder.scala 18:35]
    FullAdder_6.clock <= clock
    FullAdder_6.reset <= reset
    inst FullAdder_7 of FullAdder_7 @[Adder.scala 18:35]
    FullAdder_7.clock <= clock
    FullAdder_7.reset <= reset
    wire carry : UInt<1>[9] @[Adder.scala 19:19]
    wire sum : UInt<1>[8] @[Adder.scala 20:19]
    carry[0] <= io.Cin @[Adder.scala 23:12]
    node _T_42 = bits(io.A, 0, 0) @[Adder.scala 27:21]
    FullAdder.io.a <= _T_42 @[Adder.scala 27:14]
    node _T_43 = bits(io.B, 0, 0) @[Adder.scala 28:21]
    FullAdder.io.b <= _T_43 @[Adder.scala 28:14]
    FullAdder.io.cin <= carry[0] @[Adder.scala 29:16]
    carry[1] <= FullAdder.io.cout @[Adder.scala 30:16]
    node _T_44 = bits(_T_15, 0, 0) @[Adder.scala 31:32]
    sum[0] <= _T_44 @[Adder.scala 31:12]
    node _T_45 = bits(io.A, 1, 1) @[Adder.scala 27:21]
    FullAdder_1.io.a <= _T_45 @[Adder.scala 27:14]
    node _T_46 = bits(io.B, 1, 1) @[Adder.scala 28:21]
    FullAdder_1.io.b <= _T_46 @[Adder.scala 28:14]
    FullAdder_1.io.cin <= carry[1] @[Adder.scala 29:16]
    carry[2] <= FullAdder_1.io.cout @[Adder.scala 30:16]
    node _T_47 = bits(_T_15, 0, 0) @[Adder.scala 31:32]
    sum[1] <= _T_47 @[Adder.scala 31:12]
    node _T_48 = bits(io.A, 2, 2) @[Adder.scala 27:21]
    FullAdder_2.io.a <= _T_48 @[Adder.scala 27:14]
    node _T_49 = bits(io.B, 2, 2) @[Adder.scala 28:21]
    FullAdder_2.io.b <= _T_49 @[Adder.scala 28:14]
    FullAdder_2.io.cin <= carry[2] @[Adder.scala 29:16]
    carry[3] <= FullAdder_2.io.cout @[Adder.scala 30:16]
    node _T_50 = bits(_T_15, 0, 0) @[Adder.scala 31:32]
    sum[2] <= _T_50 @[Adder.scala 31:12]
    node _T_51 = bits(io.A, 3, 3) @[Adder.scala 27:21]
    FullAdder_3.io.a <= _T_51 @[Adder.scala 27:14]
    node _T_52 = bits(io.B, 3, 3) @[Adder.scala 28:21]
    FullAdder_3.io.b <= _T_52 @[Adder.scala 28:14]
    FullAdder_3.io.cin <= carry[3] @[Adder.scala 29:16]
    carry[4] <= FullAdder_3.io.cout @[Adder.scala 30:16]
    node _T_53 = bits(_T_15, 0, 0) @[Adder.scala 31:32]
    sum[3] <= _T_53 @[Adder.scala 31:12]
    node _T_54 = bits(io.A, 4, 4) @[Adder.scala 27:21]
    FullAdder_4.io.a <= _T_54 @[Adder.scala 27:14]
    node _T_55 = bits(io.B, 4, 4) @[Adder.scala 28:21]
    FullAdder_4.io.b <= _T_55 @[Adder.scala 28:14]
    FullAdder_4.io.cin <= carry[4] @[Adder.scala 29:16]
    carry[5] <= FullAdder_4.io.cout @[Adder.scala 30:16]
    node _T_56 = bits(_T_15, 0, 0) @[Adder.scala 31:32]
    sum[4] <= _T_56 @[Adder.scala 31:12]
    node _T_57 = bits(io.A, 5, 5) @[Adder.scala 27:21]
    FullAdder_5.io.a <= _T_57 @[Adder.scala 27:14]
    node _T_58 = bits(io.B, 5, 5) @[Adder.scala 28:21]
    FullAdder_5.io.b <= _T_58 @[Adder.scala 28:14]
    FullAdder_5.io.cin <= carry[5] @[Adder.scala 29:16]
    carry[6] <= FullAdder_5.io.cout @[Adder.scala 30:16]
    node _T_59 = bits(_T_15, 0, 0) @[Adder.scala 31:32]
    sum[5] <= _T_59 @[Adder.scala 31:12]
    node _T_60 = bits(io.A, 6, 6) @[Adder.scala 27:21]
    FullAdder_6.io.a <= _T_60 @[Adder.scala 27:14]
    node _T_61 = bits(io.B, 6, 6) @[Adder.scala 28:21]
    FullAdder_6.io.b <= _T_61 @[Adder.scala 28:14]
    FullAdder_6.io.cin <= carry[6] @[Adder.scala 29:16]
    carry[7] <= FullAdder_6.io.cout @[Adder.scala 30:16]
    node _T_62 = bits(_T_15, 0, 0) @[Adder.scala 31:32]
    sum[6] <= _T_62 @[Adder.scala 31:12]
    node _T_63 = bits(io.A, 7, 7) @[Adder.scala 27:21]
    FullAdder_7.io.a <= _T_63 @[Adder.scala 27:14]
    node _T_64 = bits(io.B, 7, 7) @[Adder.scala 28:21]
    FullAdder_7.io.b <= _T_64 @[Adder.scala 28:14]
    FullAdder_7.io.cin <= carry[7] @[Adder.scala 29:16]
    carry[8] <= FullAdder_7.io.cout @[Adder.scala 30:16]
    node _T_65 = bits(_T_15, 0, 0) @[Adder.scala 31:32]
    sum[7] <= _T_65 @[Adder.scala 31:12]
    node _T_66 = cat(sum[1], sum[0]) @[Adder.scala 33:17]
    node _T_67 = cat(sum[3], sum[2]) @[Adder.scala 33:17]
    node _T_68 = cat(_T_67, _T_66) @[Adder.scala 33:17]
    node _T_69 = cat(sum[5], sum[4]) @[Adder.scala 33:17]
    node _T_70 = cat(sum[7], sum[6]) @[Adder.scala 33:17]
    node _T_71 = cat(_T_70, _T_69) @[Adder.scala 33:17]
    node _T_72 = cat(_T_71, _T_68) @[Adder.scala 33:17]
    io.Sum <= _T_72 @[Adder.scala 33:10]
    io.Cout <= carry[8] @[Adder.scala 34:11]
很明显地看到,fir文件中没有io.sum <= _T_15

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 楼主| 发表于 2021-8-12 15:18:05 | 显示全部楼层
实验三:
如果是
var sum = Output(UInt(1.W))
io.sum := a_xor_b ^ io.cin
run/debug之后,.fir文件如下:
;buildInfoPackage: chisel3, version: 3.1.2, scalaVersion: 2.11.12, sbtVersion: 1.1.1, builtAtString: 2018-07-25 16:52:17.431, builtAtMillis: 1532537537431
circuit Adder :
  module FullAdder :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_1 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_2 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_3 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_4 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_5 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_6 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module FullAdder_7 :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip a : UInt<1>, flip b : UInt<1>, flip cin : UInt<1>, sum : UInt<1>, cout : UInt<1>}

    node a_xor_b = xor(io.a, io.b) @[FullAdder.scala 12:22]
    node _T_15 = xor(a_xor_b, io.cin) @[FullAdder.scala 13:21]
    io.sum <= _T_15 @[FullAdder.scala 13:10]
    node a_and_b = and(io.a, io.b) @[FullAdder.scala 18:22]
    node b_and_cin = and(io.b, io.cin) @[FullAdder.scala 19:24]
    node a_and_cin = and(io.a, io.cin) @[FullAdder.scala 20:24]
    node _T_16 = or(a_and_b, b_and_cin) @[FullAdder.scala 21:22]
    node _T_17 = or(_T_16, a_and_cin) @[FullAdder.scala 21:34]
    io.cout <= _T_17 @[FullAdder.scala 21:11]

  module Adder :
    input clock : Clock
    input reset : UInt<1>
    output io : {flip A : UInt<8>, flip B : UInt<8>, flip Cin : UInt<1>, Sum : UInt<8>, Cout : UInt<1>}

    inst FullAdder of FullAdder @[Adder.scala 18:35]
    FullAdder.clock <= clock
    FullAdder.reset <= reset
    inst FullAdder_1 of FullAdder_1 @[Adder.scala 18:35]
    FullAdder_1.clock <= clock
    FullAdder_1.reset <= reset
    inst FullAdder_2 of FullAdder_2 @[Adder.scala 18:35]
    FullAdder_2.clock <= clock
    FullAdder_2.reset <= reset
    inst FullAdder_3 of FullAdder_3 @[Adder.scala 18:35]
    FullAdder_3.clock <= clock
    FullAdder_3.reset <= reset
    inst FullAdder_4 of FullAdder_4 @[Adder.scala 18:35]
    FullAdder_4.clock <= clock
    FullAdder_4.reset <= reset
    inst FullAdder_5 of FullAdder_5 @[Adder.scala 18:35]
    FullAdder_5.clock <= clock
    FullAdder_5.reset <= reset
    inst FullAdder_6 of FullAdder_6 @[Adder.scala 18:35]
    FullAdder_6.clock <= clock
    FullAdder_6.reset <= reset
    inst FullAdder_7 of FullAdder_7 @[Adder.scala 18:35]
    FullAdder_7.clock <= clock
    FullAdder_7.reset <= reset
    wire carry : UInt<1>[9] @[Adder.scala 19:19]
    wire sum : UInt<1>[8] @[Adder.scala 20:19]
    carry[0] <= io.Cin @[Adder.scala 23:12]
    node _T_42 = bits(io.A, 0, 0) @[Adder.scala 27:21]
    FullAdder.io.a <= _T_42 @[Adder.scala 27:14]
    node _T_43 = bits(io.B, 0, 0) @[Adder.scala 28:21]
    FullAdder.io.b <= _T_43 @[Adder.scala 28:14]
    FullAdder.io.cin <= carry[0] @[Adder.scala 29:16]
    carry[1] <= FullAdder.io.cout @[Adder.scala 30:16]
    node _T_44 = bits(FullAdder.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[0] <= _T_44 @[Adder.scala 31:12]
    node _T_45 = bits(io.A, 1, 1) @[Adder.scala 27:21]
    FullAdder_1.io.a <= _T_45 @[Adder.scala 27:14]
    node _T_46 = bits(io.B, 1, 1) @[Adder.scala 28:21]
    FullAdder_1.io.b <= _T_46 @[Adder.scala 28:14]
    FullAdder_1.io.cin <= carry[1] @[Adder.scala 29:16]
    carry[2] <= FullAdder_1.io.cout @[Adder.scala 30:16]
    node _T_47 = bits(FullAdder_1.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[1] <= _T_47 @[Adder.scala 31:12]
    node _T_48 = bits(io.A, 2, 2) @[Adder.scala 27:21]
    FullAdder_2.io.a <= _T_48 @[Adder.scala 27:14]
    node _T_49 = bits(io.B, 2, 2) @[Adder.scala 28:21]
    FullAdder_2.io.b <= _T_49 @[Adder.scala 28:14]
    FullAdder_2.io.cin <= carry[2] @[Adder.scala 29:16]
    carry[3] <= FullAdder_2.io.cout @[Adder.scala 30:16]
    node _T_50 = bits(FullAdder_2.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[2] <= _T_50 @[Adder.scala 31:12]
    node _T_51 = bits(io.A, 3, 3) @[Adder.scala 27:21]
    FullAdder_3.io.a <= _T_51 @[Adder.scala 27:14]
    node _T_52 = bits(io.B, 3, 3) @[Adder.scala 28:21]
    FullAdder_3.io.b <= _T_52 @[Adder.scala 28:14]
    FullAdder_3.io.cin <= carry[3] @[Adder.scala 29:16]
    carry[4] <= FullAdder_3.io.cout @[Adder.scala 30:16]
    node _T_53 = bits(FullAdder_3.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[3] <= _T_53 @[Adder.scala 31:12]
    node _T_54 = bits(io.A, 4, 4) @[Adder.scala 27:21]
    FullAdder_4.io.a <= _T_54 @[Adder.scala 27:14]
    node _T_55 = bits(io.B, 4, 4) @[Adder.scala 28:21]
    FullAdder_4.io.b <= _T_55 @[Adder.scala 28:14]
    FullAdder_4.io.cin <= carry[4] @[Adder.scala 29:16]
    carry[5] <= FullAdder_4.io.cout @[Adder.scala 30:16]
    node _T_56 = bits(FullAdder_4.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[4] <= _T_56 @[Adder.scala 31:12]
    node _T_57 = bits(io.A, 5, 5) @[Adder.scala 27:21]
    FullAdder_5.io.a <= _T_57 @[Adder.scala 27:14]
    node _T_58 = bits(io.B, 5, 5) @[Adder.scala 28:21]
    FullAdder_5.io.b <= _T_58 @[Adder.scala 28:14]
    FullAdder_5.io.cin <= carry[5] @[Adder.scala 29:16]
    carry[6] <= FullAdder_5.io.cout @[Adder.scala 30:16]
    node _T_59 = bits(FullAdder_5.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[5] <= _T_59 @[Adder.scala 31:12]
    node _T_60 = bits(io.A, 6, 6) @[Adder.scala 27:21]
    FullAdder_6.io.a <= _T_60 @[Adder.scala 27:14]
    node _T_61 = bits(io.B, 6, 6) @[Adder.scala 28:21]
    FullAdder_6.io.b <= _T_61 @[Adder.scala 28:14]
    FullAdder_6.io.cin <= carry[6] @[Adder.scala 29:16]
    carry[7] <= FullAdder_6.io.cout @[Adder.scala 30:16]
    node _T_62 = bits(FullAdder_6.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[6] <= _T_62 @[Adder.scala 31:12]
    node _T_63 = bits(io.A, 7, 7) @[Adder.scala 27:21]
    FullAdder_7.io.a <= _T_63 @[Adder.scala 27:14]
    node _T_64 = bits(io.B, 7, 7) @[Adder.scala 28:21]
    FullAdder_7.io.b <= _T_64 @[Adder.scala 28:14]
    FullAdder_7.io.cin <= carry[7] @[Adder.scala 29:16]
    carry[8] <= FullAdder_7.io.cout @[Adder.scala 30:16]
    node _T_65 = bits(FullAdder_7.io.sum, 0, 0) @[Adder.scala 31:32]
    sum[7] <= _T_65 @[Adder.scala 31:12]
    node _T_66 = cat(sum[1], sum[0]) @[Adder.scala 33:17]
    node _T_67 = cat(sum[3], sum[2]) @[Adder.scala 33:17]
    node _T_68 = cat(_T_67, _T_66) @[Adder.scala 33:17]
    node _T_69 = cat(sum[5], sum[4]) @[Adder.scala 33:17]
    node _T_70 = cat(sum[7], sum[6]) @[Adder.scala 33:17]
    node _T_71 = cat(_T_70, _T_69) @[Adder.scala 33:17]
    node _T_72 = cat(_T_71, _T_68) @[Adder.scala 33:17]
    io.Sum <= _T_72 @[Adder.scala 33:10]
    io.Cout <= carry[8] @[Adder.scala 34:11]

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 楼主| 发表于 2021-8-12 15:18:34 | 显示全部楼层
verilog文件如下:
module FullAdder( // @[3.2]
  input   io_a, // @[6.4]
  input   io_b, // @[6.4]
  input   io_cin, // @[6.4]
  output  io_sum, // @[6.4]
  output  io_cout // @[6.4]
);
  wire  a_xor_b; // @[FullAdder.scala 12:228.4]
  wire  a_and_b; // @[FullAdder.scala 18:2211.4]
  wire  b_and_cin; // @[FullAdder.scala 19:2412.4]
  wire  a_and_cin; // @[FullAdder.scala 20:2413.4]
  wire  _T_16; // @[FullAdder.scala 21:22:@14.4]
  assign a_xor_b = io_a ^ io_b; // @[FullAdder.scala 12:22:@8.4]
  assign a_and_b = io_a & io_b; // @[FullAdder.scala 18:22:@11.4]
  assign b_and_cin = io_b & io_cin; // @[FullAdder.scala 19:24:@12.4]
  assign a_and_cin = io_a & io_cin; // @[FullAdder.scala 20:24:@13.4]
  assign _T_16 = a_and_b | b_and_cin; // @[FullAdder.scala 21:22:@14.4]
  assign io_sum = a_xor_b ^ io_cin; // @[FullAdder.scala 13:10:@10.4]
  assign io_cout = _T_16 | a_and_cin; // @[FullAdder.scala 21:11:@16.4]
endmodule
module Adder( // @[:@123.2]
  input        clock, // @[:@124.4]
  input        reset, // @[:@125.4]
  input  [7:0] io_A, // @[:@126.4]
  input  [7:0] io_B, // @[:@126.4]
  input        io_Cin, // @[:@126.4]
  output [7:0] io_Sum, // @[:@126.4]
  output       io_Cout // @[:@126.4]
);
  wire  FullAdder_io_a; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_io_b; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_io_cin; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_io_sum; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_io_cout; // @[Adder.scala 18:35:@128.4]
  wire  FullAdder_1_io_a; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_1_io_b; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_1_io_cin; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_1_io_sum; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_1_io_cout; // @[Adder.scala 18:35:@131.4]
  wire  FullAdder_2_io_a; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_2_io_b; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_2_io_cin; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_2_io_sum; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_2_io_cout; // @[Adder.scala 18:35:@134.4]
  wire  FullAdder_3_io_a; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_3_io_b; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_3_io_cin; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_3_io_sum; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_3_io_cout; // @[Adder.scala 18:35:@137.4]
  wire  FullAdder_4_io_a; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_4_io_b; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_4_io_cin; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_4_io_sum; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_4_io_cout; // @[Adder.scala 18:35:@140.4]
  wire  FullAdder_5_io_a; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_5_io_b; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_5_io_cin; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_5_io_sum; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_5_io_cout; // @[Adder.scala 18:35:@143.4]
  wire  FullAdder_6_io_a; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_6_io_b; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_6_io_cin; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_6_io_sum; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_6_io_cout; // @[Adder.scala 18:35:@146.4]
  wire  FullAdder_7_io_a; // @[Adder.scala 18:35:@149.4]
  wire  FullAdder_7_io_b; // @[Adder.scala 18:35:@149.4]
  wire  FullAdder_7_io_cin; // @[Adder.scala 18:35:@149.4]
  wire  FullAdder_7_io_sum; // @[Adder.scala 18:35:@149.4]
  wire  FullAdder_7_io_cout; // @[Adder.scala 18:35:@149.4]
  wire  sum_0; // @[Adder.scala 31:32:@161.4]
  wire  sum_1; // @[Adder.scala 31:32:@169.4]
  wire  sum_2; // @[Adder.scala 31:32:@177.4]
  wire  sum_3; // @[Adder.scala 31:32:@185.4]
  wire  sum_4; // @[Adder.scala 31:32:@193.4]
  wire  sum_5; // @[Adder.scala 31:32:@201.4]
  wire  sum_6; // @[Adder.scala 31:32:@209.4]
  wire  sum_7; // @[Adder.scala 31:32:@217.4]
  wire [1:0] _T_66; // @[Adder.scala 33:17:@219.4]
  wire [1:0] _T_67; // @[Adder.scala 33:17:@220.4]
  wire [3:0] _T_68; // @[Adder.scala 33:17:@221.4]
  wire [1:0] _T_69; // @[Adder.scala 33:17:@222.4]
  wire [1:0] _T_70; // @[Adder.scala 33:17:@223.4]
  wire [3:0] _T_71; // @[Adder.scala 33:17:@224.4]
  FullAdder FullAdder ( // @[Adder.scala 18:35:@128.4]
    .io_a(FullAdder_io_a),
    .io_b(FullAdder_io_b),
    .io_cin(FullAdder_io_cin),
    .io_sum(FullAdder_io_sum),
    .io_cout(FullAdder_io_cout)
  );
  FullAdder FullAdder_1 ( // @[Adder.scala 18:35:@131.4]
    .io_a(FullAdder_1_io_a),
    .io_b(FullAdder_1_io_b),
    .io_cin(FullAdder_1_io_cin),
    .io_sum(FullAdder_1_io_sum),
    .io_cout(FullAdder_1_io_cout)
  );
  FullAdder FullAdder_2 ( // @[Adder.scala 18:35:@134.4]
    .io_a(FullAdder_2_io_a),
    .io_b(FullAdder_2_io_b),
    .io_cin(FullAdder_2_io_cin),
    .io_sum(FullAdder_2_io_sum),
    .io_cout(FullAdder_2_io_cout)
  );
  FullAdder FullAdder_3 ( // @[Adder.scala 18:35:@137.4]
    .io_a(FullAdder_3_io_a),
    .io_b(FullAdder_3_io_b),
    .io_cin(FullAdder_3_io_cin),
    .io_sum(FullAdder_3_io_sum),
    .io_cout(FullAdder_3_io_cout)
  );
  FullAdder FullAdder_4 ( // @[Adder.scala 18:35:@140.4]
    .io_a(FullAdder_4_io_a),
    .io_b(FullAdder_4_io_b),
    .io_cin(FullAdder_4_io_cin),
    .io_sum(FullAdder_4_io_sum),
    .io_cout(FullAdder_4_io_cout)
  );
  FullAdder FullAdder_5 ( // @[Adder.scala 18:35:@143.4]
    .io_a(FullAdder_5_io_a),
    .io_b(FullAdder_5_io_b),
    .io_cin(FullAdder_5_io_cin),
    .io_sum(FullAdder_5_io_sum),
    .io_cout(FullAdder_5_io_cout)
  );
  FullAdder FullAdder_6 ( // @[Adder.scala 18:35:@146.4]
    .io_a(FullAdder_6_io_a),
    .io_b(FullAdder_6_io_b),
    .io_cin(FullAdder_6_io_cin),
    .io_sum(FullAdder_6_io_sum),
    .io_cout(FullAdder_6_io_cout)
  );
  FullAdder FullAdder_7 ( // @[Adder.scala 18:35:@149.4]
    .io_a(FullAdder_7_io_a),
    .io_b(FullAdder_7_io_b),
    .io_cin(FullAdder_7_io_cin),
    .io_sum(FullAdder_7_io_sum),
    .io_cout(FullAdder_7_io_cout)
  );
  assign sum_0 = FullAdder_io_sum; // @[Adder.scala 31:32:@161.4]
  assign sum_1 = FullAdder_1_io_sum; // @[Adder.scala 31:32:@169.4]
  assign sum_2 = FullAdder_2_io_sum; // @[Adder.scala 31:32:@177.4]
  assign sum_3 = FullAdder_3_io_sum; // @[Adder.scala 31:32:@185.4]
  assign sum_4 = FullAdder_4_io_sum; // @[Adder.scala 31:32:@193.4]
  assign sum_5 = FullAdder_5_io_sum; // @[Adder.scala 31:32:@201.4]
  assign sum_6 = FullAdder_6_io_sum; // @[Adder.scala 31:32:@209.4]
  assign sum_7 = FullAdder_7_io_sum; // @[Adder.scala 31:32:@217.4]
  assign _T_66 = {sum_1,sum_0}; // @[Adder.scala 33:17:@219.4]
  assign _T_67 = {sum_3,sum_2}; // @[Adder.scala 33:17:@220.4]
  assign _T_68 = {_T_67,_T_66}; // @[Adder.scala 33:17:@221.4]
  assign _T_69 = {sum_5,sum_4}; // @[Adder.scala 33:17:@222.4]
  assign _T_70 = {sum_7,sum_6}; // @[Adder.scala 33:17:@223.4]
  assign _T_71 = {_T_70,_T_69}; // @[Adder.scala 33:17:@224.4]
  assign io_Sum = {_T_71,_T_68}; // @[Adder.scala 33:10:@226.4]
  assign io_Cout = FullAdder_7_io_cout; // @[Adder.scala 34:11:@227.4]
  assign FullAdder_io_a = io_A[0]; // @[Adder.scala 27:14:@156.4]
  assign FullAdder_io_b = io_B[0]; // @[Adder.scala 28:14:@158.4]
  assign FullAdder_io_cin = io_Cin; // @[Adder.scala 29:16:@159.4]
  assign FullAdder_1_io_a = io_A[1]; // @[Adder.scala 27:14:@164.4]
  assign FullAdder_1_io_b = io_B[1]; // @[Adder.scala 28:14:@166.4]
  assign FullAdder_1_io_cin = FullAdder_io_cout; // @[Adder.scala 29:16:@167.4]
  assign FullAdder_2_io_a = io_A[2]; // @[Adder.scala 27:14:@172.4]
  assign FullAdder_2_io_b = io_B[2]; // @[Adder.scala 28:14:@174.4]
  assign FullAdder_2_io_cin = FullAdder_1_io_cout; // @[Adder.scala 29:16:@175.4]
  assign FullAdder_3_io_a = io_A[3]; // @[Adder.scala 27:14:@180.4]
  assign FullAdder_3_io_b = io_B[3]; // @[Adder.scala 28:14:@182.4]
  assign FullAdder_3_io_cin = FullAdder_2_io_cout; // @[Adder.scala 29:16:@183.4]
  assign FullAdder_4_io_a = io_A[4]; // @[Adder.scala 27:14:@188.4]
  assign FullAdder_4_io_b = io_B[4]; // @[Adder.scala 28:14:@190.4]
  assign FullAdder_4_io_cin = FullAdder_3_io_cout; // @[Adder.scala 29:16:@191.4]
  assign FullAdder_5_io_a = io_A[5]; // @[Adder.scala 27:14:@196.4]
  assign FullAdder_5_io_b = io_B[5]; // @[Adder.scala 28:14:@198.4]
  assign FullAdder_5_io_cin = FullAdder_4_io_cout; // @[Adder.scala 29:16:@199.4]
  assign FullAdder_6_io_a = io_A[6]; // @[Adder.scala 27:14:@204.4]
  assign FullAdder_6_io_b = io_B[6]; // @[Adder.scala 28:14:@206.4]
  assign FullAdder_6_io_cin = FullAdder_5_io_cout; // @[Adder.scala 29:16:@207.4]
  assign FullAdder_7_io_a = io_A[7]; // @[Adder.scala 27:14:@212.4]
  assign FullAdder_7_io_b = io_B[7]; // @[Adder.scala 28:14:@214.4]
  assign FullAdder_7_io_cin = FullAdder_6_io_cout; // @[Adder.scala 29:16:@215.4]
endmodule

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 楼主| 发表于 2021-8-12 15:20:07 | 显示全部楼层
总结:
在val sum 和sum:=以及var sum和sum:=两种语法情况下,都可以正确产生verilog文件,用totalcommand工具对两种情况产生的verilgo文件进行内容比较,发现是一致的,
而且两种情况下产生的.fir文件的内容也是一样的。
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