|

楼主 |
发表于 2022-10-13 13:06:31
|
显示全部楼层
t.elf: file format elf32-littlearm
Disassembly of section .text:
00010000 <start>:
10000: e59fd030 ldr sp, [pc, #48] ; 10038 <sum+0x2c>
10004: eb000022 bl 10094 <main>
00010008 <stop>:
10008: eafffffe b 10008 <stop>
0001000c <sum>:
1000c: e92d4800 push {fp, lr}
10010: e28db004 add fp, sp, #4
10014: e0800001 add r0, r0, r1
10018: e0800002 add r0, r0, r2
1001c: e0800003 add r0, r0, r3
10020: e59b3004 ldr r3, [fp, #4]
10024: e0800003 add r0, r0, r3
10028: e59b3008 ldr r3, [fp, #8]
1002c: e0800003 add r0, r0, r3
10030: e24bd004 sub sp, fp, #4
10034: e8bd8800 pop {fp, pc}
10038: 00011120 andeq r1, r1, r0, lsr #2
0001003c <sum>:
1003c: e52db004 push {fp} ; (str fp, [sp, #-4]!)
10040: e28db000 add fp, sp, #0
10044: e24dd014 sub sp, sp, #20
10048: e50b0008 str r0, [fp, #-8]
1004c: e50b100c str r1, [fp, #-12]
10050: e50b2010 str r2, [fp, #-16]
10054: e50b3014 str r3, [fp, #-20] ; 0xffffffec
10058: e51b2008 ldr r2, [fp, #-8]
1005c: e51b300c ldr r3, [fp, #-12]
10060: e0822003 add r2, r2, r3
10064: e51b3010 ldr r3, [fp, #-16]
10068: e0822003 add r2, r2, r3
1006c: e51b3014 ldr r3, [fp, #-20] ; 0xffffffec
10070: e0822003 add r2, r2, r3
10074: e59b3004 ldr r3, [fp, #4]
10078: e0822003 add r2, r2, r3
1007c: e59b3008 ldr r3, [fp, #8]
10080: e0823003 add r3, r2, r3
10084: e1a00003 mov r0, r3
10088: e24bd000 sub sp, fp, #0
1008c: e49db004 pop {fp} ; (ldr fp, [sp], #4)
10090: e12fff1e bx lr
00010094 <main>:
10094: e92d4800 push {fp, lr}
10098: e28db004 add fp, sp, #4
1009c: e24dd020 sub sp, sp, #32
100a0: e3a03001 mov r3, #1
100a4: e50b3008 str r3, [fp, #-8]
100a8: e51b3008 ldr r3, [fp, #-8]
100ac: e50b300c str r3, [fp, #-12]
100b0: e51b300c ldr r3, [fp, #-12]
100b4: e50b3010 str r3, [fp, #-16]
100b8: e51b3010 ldr r3, [fp, #-16]
100bc: e50b3014 str r3, [fp, #-20] ; 0xffffffec
100c0: e51b3014 ldr r3, [fp, #-20] ; 0xffffffec
100c4: e50b3018 str r3, [fp, #-24] ; 0xffffffe8
100c8: e3a03003 mov r3, #3
100cc: e50b301c str r3, [fp, #-28] ; 0xffffffe4
100d0: e51b301c ldr r3, [fp, #-28] ; 0xffffffe4
100d4: e58d3004 str r3, [sp, #4]
100d8: e51b3008 ldr r3, [fp, #-8]
100dc: e58d3000 str r3, [sp]
100e0: e51b300c ldr r3, [fp, #-12]
100e4: e51b2010 ldr r2, [fp, #-16]
100e8: e51b1014 ldr r1, [fp, #-20] ; 0xffffffec
100ec: e51b0018 ldr r0, [fp, #-24] ; 0xffffffe8
100f0: ebffffd1 bl 1003c <sum>
100f4: e1a02000 mov r2, r0
100f8: e59f3014 ldr r3, [pc, #20] ; 10114 <main+0x80>
100fc: e5832000 str r2, [r3]
10100: e3a03000 mov r3, #0
10104: e1a00003 mov r0, r3
10108: e24bd004 sub sp, fp, #4
1010c: e8bd4800 pop {fp, lr}
10110: e12fff1e bx lr
10114: 00010118 andeq r0, r1, r8, lsl r1
Disassembly of section .data:
00010118 <g>:
10118: 00000064 andeq r0, r0, r4, rrx
Disassembly of section .ARM.attributes:
00000000 <.ARM.attributes>:
0: 00002b41 andeq r2, r0, r1, asr #22
4: 61656100 cmnvs r5, r0, lsl #2
8: 01006962 tsteq r0, r2, ror #18
c: 00000021 andeq r0, r0, r1, lsr #32
10: 4d524105 ldfmie f4, [r2, #-20] ; 0xffffffec
14: 4d445437 cfstrdmi mvd5, [r4, #-220] ; 0xffffff24
18: 02060049 andeq r0, r6, #73 ; 0x49
1c: 01090108 tsteq r9, r8, lsl #2
20: 01140412 tsteq r4, r2, lsl r4
24: 03170115 tsteq r7, #1073741829 ; 0x40000005
28: 011a0118 tsteq sl, r8, lsl r1
Disassembly of section .comment:
00000000 <.comment>:
0: 3a434347 bcc 10d0d24 <stack_top+0x10bfc04>
4: 4e472820 cdpmi 8, 4, cr2, cr7, cr0, {1}
8: 6f542055 svcvs 0x00542055
c: 20736c6f rsbscs r6, r3, pc, ror #24
10: 20726f66 rsbscs r6, r2, r6, ror #30
14: 204d5241 subcs r5, sp, r1, asr #4
18: 65626d45 strbvs r6, [r2, #-3397]! ; 0xfffff2bb
1c: 64656464 strbtvs r6, [r5], #-1124 ; 0xfffffb9c
20: 6f725020 svcvs 0x00725020
24: 73736563 cmnvc r3, #415236096 ; 0x18c00000
28: 2973726f ldmdbcs r3!, {r0, r1, r2, r3, r5, r6, r9, ip, sp, lr}^
2c: 332e3520 ; <UNDEFINED> instruction: 0x332e3520
30: 3220312e eorcc r3, r0, #-2147483637 ; 0x8000000b
34: 30363130 eorscc r3, r6, r0, lsr r1
38: 20373033 eorscs r3, r7, r3, lsr r0
3c: 6c657228 sfmvs f7, 2, [r5], #-160 ; 0xffffff60
40: 65736165 ldrbvs r6, [r3, #-357]! ; 0xfffffe9b
44: 415b2029 cmpmi fp, r9, lsr #32
48: 652f4d52 strvs r4, [pc, #-3410]! ; fffff2fe <stack_top+0xfffee1de>
4c: 6465626d strbtvs r6, [r5], #-621 ; 0xfffffd93
50: 2d646564 cfstr64cs mvdx6, [r4, #-400]! ; 0xfffffe70
54: 72622d35 rsbvc r2, r2, #3392 ; 0xd40
58: 68636e61 stmdavs r3!, {r0, r5, r6, r9, sl, fp, sp, lr}^
5c: 76657220 strbtvc r7, [r5], -r0, lsr #4
60: 6f697369 svcvs 0x00697369
64: 3332206e teqcc r2, #110 ; 0x6e
68: 39383534 ldmdbcc r8!, {r2, r4, r5, r8, sl, ip, sp}
6c: Address 0x0000006c is out of bounds.
Disassembly of section .debug_line:
00000000 <.debug_line>:
0: 00000040 andeq r0, r0, r0, asr #32
4: 001b0002 andseq r0, fp, r2
8: 01020000 mrseq r0, (UNDEF: 2)
c: 000d0efb strdeq r0, [sp], -fp
10: 01010101 tsteq r1, r1, lsl #2
14: 01000000 mrseq r0, (UNDEF: 0)
18: 00010000 andeq r0, r1, r0
1c: 732e7374 ; <UNDEFINED> instruction: 0x732e7374
20: 00000000 andeq r0, r0, r0
24: 02050000 andeq r0, r5, #0
28: 00010000 andeq r0, r1, r0
2c: 312f3517 ; <UNDEFINED> instruction: 0x312f3517
30: 2e090332 mcrcs 3, 0, r0, cr9, cr2, {1}
34: 2f2f2f30 svccs 0x002f2f30
38: 2f302f2f svccs 0x00302f2f
3c: 022e5e03 eoreq r5, lr, #3, 28 ; 0x30
40: 01010002 tsteq r1, r2
44: 00000037 andeq r0, r0, r7, lsr r0
48: 001a0002 andseq r0, sl, r2
4c: 01020000 mrseq r0, (UNDEF: 2)
50: 000d0efb strdeq r0, [sp], -fp
54: 01010101 tsteq r1, r1, lsl #2
58: 01000000 mrseq r0, (UNDEF: 0)
5c: 00010000 andeq r0, r1, r0
60: 00632e74 rsbeq r2, r3, r4, ror lr
64: 00000000 andeq r0, r0, r0
68: 3c020500 cfstr32cc mvfx0, [r2], {-0}
6c: 15000100 strne r0, [r0, #-256] ; 0xffffff00
70: 845908d7 ldrbhi r0, [r9], #-2263 ; 0xfffff729
74: 4b3d0868 blmi f4221c <stack_top+0xf310fc>
78: 0a029108 beq a44a0 <stack_top+0x93380>
7c: Address 0x0000007c is out of bounds.
Disassembly of section .debug_info:
00000000 <.debug_info>:
0: 00000047 andeq r0, r0, r7, asr #32
4: 00000002 andeq r0, r0, r2
8: 01040000 mrseq r0, (UNDEF: 4)
c: 00000000 andeq r0, r0, r0
10: 00010000 andeq r0, r1, r0
14: 0001003c andeq r0, r1, ip, lsr r0
18: 732e7374 ; <UNDEFINED> instruction: 0x732e7374
1c: 5c3a4800 ldcpl 8, cr4, [sl], #-0
20: 5c504d54 mrrcpl 13, 5, r4, r0, cr4
24: 73707466 cmnvc r0, #1711276032 ; 0x66000000
28: 65767265 ldrbvs r7, [r6, #-613]! ; 0xfffffd9b
2c: 6f6f7272 svcvs 0x006f7272
30: 72615c74 rsbvc r5, r1, #116, 24 ; 0x7400
34: 6162396d cmnvs r2, sp, ror #18
38: 47006572 smlsdxmi r0, r2, r5, r6
3c: 4120554e ; <UNDEFINED> instruction: 0x4120554e
40: 2e322053 mrccs 0, 1, r2, cr2, cr3, {2}
44: 302e3632 eorcc r3, lr, r2, lsr r6
48: fc800100 stc2 1, cr0, [r0], {0}
4c: 04000000 streq r0, [r0], #-0
50: 00001400 andeq r1, r0, r0, lsl #8
54: 00010400 andeq r0, r1, r0, lsl #8
58: 0c000000 stceq 0, cr0, [r0], {-0}
5c: 00632e74 rsbeq r2, r3, r4, ror lr
60: 00000051 andeq r0, r0, r1, asr r0
64: 0001003c andeq r0, r1, ip, lsr r0
68: 000000dc ldrdeq r0, [r0], -ip
6c: 00000044 andeq r0, r0, r4, asr #32
70: 6d757302 ldclvs 3, cr7, [r5, #-8]!
74: 87030100 strhi r0, [r3, -r0, lsl #2]
78: 3c000000 stccc 0, cr0, [r0], {-0}
7c: 58000100 stmdapl r0, {r8}
80: 01000000 mrseq r0, (UNDEF: 0)
84: 0000879c muleq r0, ip, r7
88: 00610300 rsbeq r0, r1, r0, lsl #6
8c: 00870301 addeq r0, r7, r1, lsl #6
90: 91020000 mrsls r0, (UNDEF: 2)
94: 00620374 rsbeq r0, r2, r4, ror r3
98: 00870301 addeq r0, r7, r1, lsl #6
9c: 91020000 mrsls r0, (UNDEF: 2)
a0: 00630370 rsbeq r0, r3, r0, ror r3
a4: 00870301 addeq r0, r7, r1, lsl #6
a8: 91020000 mrsls r0, (UNDEF: 2)
ac: 0064036c rsbeq r0, r4, ip, ror #6
b0: 00870301 addeq r0, r7, r1, lsl #6
b4: 91020000 mrsls r0, (UNDEF: 2)
b8: 00650368 rsbeq r0, r5, r8, ror #6
bc: 00870301 addeq r0, r7, r1, lsl #6
c0: 91020000 mrsls r0, (UNDEF: 2)
c4: 00660300 rsbeq r0, r6, r0, lsl #6
c8: 00870301 addeq r0, r7, r1, lsl #6
cc: 91020000 mrsls r0, (UNDEF: 2)
d0: 04040004 streq r0, [r4], #-4
d4: 746e6905 strbtvc r6, [lr], #-2309 ; 0xfffff6fb
d8: 004c0500 subeq r0, ip, r0, lsl #10
dc: 07010000 streq r0, [r1, -r0]
e0: 00000087 andeq r0, r0, r7, lsl #1
e4: 00010094 muleq r1, r4, r0
e8: 00000084 andeq r0, r0, r4, lsl #1
ec: 00f09c01 rscseq r9, r0, r1, lsl #24
f0: 61060000 mrsvs r0, (UNDEF: 6)
f4: 87090100 strhi r0, [r9, -r0, lsl #2]
f8: 02000000 andeq r0, r0, #0
fc: 62066491 andvs r6, r6, #-1862270976 ; 0x91000000
100: 87090100 strhi r0, [r9, -r0, lsl #2]
104: 02000000 andeq r0, r0, #0
108: 63066891 movwvs r6, #26769 ; 0x6891
10c: 87090100 strhi r0, [r9, -r0, lsl #2]
110: 02000000 andeq r0, r0, #0
114: 64066c91 strvs r6, [r6], #-3217 ; 0xfffff36f
118: 87090100 strhi r0, [r9, -r0, lsl #2]
11c: 02000000 andeq r0, r0, #0
120: 65067091 strvs r7, [r6, #-145] ; 0xffffff6f
124: 87090100 strhi r0, [r9, -r0, lsl #2]
128: 02000000 andeq r0, r0, #0
12c: 66067491 ; <UNDEFINED> instruction: 0x66067491
130: 87090100 strhi r0, [r9, -r0, lsl #2]
134: 02000000 andeq r0, r0, #0
138: 07006091 ; <UNDEFINED> instruction: 0x07006091
13c: 01010067 tsteq r1, r7, rrx
140: 00000087 andeq r0, r0, r7, lsl #1
144: 01180305 tsteq r8, r5, lsl #6
148: Address 0x00000148 is out of bounds.
Disassembly of section .debug_abbrev:
00000000 <.debug_abbrev>:
0: 10001101 andne r1, r0, r1, lsl #2
4: 12011106 andne r1, r1, #-2147483647 ; 0x80000001
8: 1b080301 blne 200c14 <stack_top+0x1efaf4>
c: 13082508 movwne r2, #34056 ; 0x8508
10: 00000005 andeq r0, r0, r5
14: 25011101 strcs r1, [r1, #-257] ; 0xfffffeff
18: 030b130e movweq r1, #45838 ; 0xb30e
1c: 110e1b08 tstne lr, r8, lsl #22
20: 10061201 andne r1, r6, r1, lsl #4
24: 02000017 andeq r0, r0, #23
28: 193f012e ldmdbne pc!, {r1, r2, r3, r5, r8} ; <UNPREDICTABLE>
2c: 0b3a0803 bleq e82040 <stack_top+0xe70f20>
30: 19270b3b stmdbne r7!, {r0, r1, r3, r4, r5, r8, r9, fp}
34: 01111349 tsteq r1, r9, asr #6
38: 18400612 stmdane r0, {r1, r4, r9, sl}^
3c: 01194297 ; <UNDEFINED> instruction: 0x01194297
40: 03000013 movweq r0, #19
44: 08030005 stmdaeq r3, {r0, r2}
48: 0b3b0b3a bleq ec2d38 <stack_top+0xeb1c18>
4c: 18021349 stmdane r2, {r0, r3, r6, r8, r9, ip}
50: 24040000 strcs r0, [r4], #-0
54: 3e0b0b00 vmlacc.f64 d0, d11, d0
58: 0008030b andeq r0, r8, fp, lsl #6
5c: 012e0500 ; <UNDEFINED> instruction: 0x012e0500
60: 0e03193f mcreq 9, 0, r1, cr3, cr15, {1}
64: 0b3b0b3a bleq ec2d54 <stack_top+0xeb1c34>
68: 01111349 tsteq r1, r9, asr #6
6c: 18400612 stmdane r0, {r1, r4, r9, sl}^
70: 01194296 ; <UNDEFINED> instruction: 0x01194296
74: 06000013 ; <UNDEFINED> instruction: 0x06000013
78: 08030034 stmdaeq r3, {r2, r4, r5}
7c: 0b3b0b3a bleq ec2d6c <stack_top+0xeb1c4c>
80: 18021349 stmdane r2, {r0, r3, r6, r8, r9, ip}
84: 34070000 strcc r0, [r7], #-0
88: 3a080300 bcc 200c90 <stack_top+0x1efb70>
8c: 490b3b0b stmdbmi fp, {r0, r1, r3, r8, r9, fp, ip, sp}
90: 02193f13 andseq r3, r9, #19, 30 ; 0x4c
94: 00000018 andeq r0, r0, r8, lsl r0
Disassembly of section .debug_aranges:
00000000 <.debug_aranges>:
0: 0000001c andeq r0, r0, ip, lsl r0
4: 00000002 andeq r0, r0, r2
8: 00040000 andeq r0, r4, r0
c: 00000000 andeq r0, r0, r0
10: 00010000 andeq r0, r1, r0
14: 0000003c andeq r0, r0, ip, lsr r0
...
20: 0000001c andeq r0, r0, ip, lsl r0
24: 004b0002 subeq r0, fp, r2
28: 00040000 andeq r0, r4, r0
2c: 00000000 andeq r0, r0, r0
30: 0001003c andeq r0, r1, ip, lsr r0
34: 000000dc ldrdeq r0, [r0], -ip
...
Disassembly of section .debug_str:
00000000 <.debug_str>:
0: 20554e47 subscs r4, r5, r7, asr #28
4: 20313143 eorscs r3, r1, r3, asr #2
8: 2e332e35 mrccs 14, 1, r2, cr3, cr5, {1}
c: 30322031 eorscc r2, r2, r1, lsr r0
10: 33303631 teqcc r0, #51380224 ; 0x3100000
14: 28203730 stmdacs r0!, {r4, r5, r8, r9, sl, ip, sp}
18: 656c6572 strbvs r6, [ip, #-1394]! ; 0xfffffa8e
1c: 29657361 stmdbcs r5!, {r0, r5, r6, r8, r9, ip, sp, lr}^
20: 52415b20 subpl r5, r1, #32, 22 ; 0x8000
24: 6d652f4d stclvs 15, cr2, [r5, #-308]! ; 0xfffffecc
28: 64646562 strbtvs r6, [r4], #-1378 ; 0xfffffa9e
2c: 352d6465 strcc r6, [sp, #-1125]! ; 0xfffffb9b
30: 6172622d cmnvs r2, sp, lsr #4
34: 2068636e rsbcs r6, r8, lr, ror #6
38: 69766572 ldmdbvs r6!, {r1, r4, r5, r6, r8, sl, sp, lr}^
3c: 6e6f6973 mcrvs 9, 3, r6, cr15, cr3, {3}
40: 34333220 ldrtcc r3, [r3], #-544 ; 0xfffffde0
44: 5d393835 ldcpl 8, cr3, [r9, #-212]! ; 0xffffff2c
48: 00672d20 rsbeq r2, r7, r0, lsr #26
4c: 6e69616d powvsez f6, f1, #5.0
50: 5c3a4800 ldcpl 8, cr4, [sl], #-0
54: 5c504d54 mrrcpl 13, 5, r4, r0, cr4
58: 73707466 cmnvc r0, #1711276032 ; 0x66000000
5c: 65767265 ldrbvs r7, [r6, #-613]! ; 0xfffffd9b
60: 6f6f7272 svcvs 0x006f7272
64: 72615c74 rsbvc r5, r1, #116, 24 ; 0x7400
68: 6162396d cmnvs r2, sp, ror #18
6c: Address 0x0000006c is out of bounds.
Disassembly of section .debug_frame:
00000000 <.debug_frame>:
0: 0000000c andeq r0, r0, ip
4: ffffffff ; <UNDEFINED> instruction: 0xffffffff
8: 7c020001 stcvc 0, cr0, [r2], {1}
c: 000d0c0e andeq r0, sp, lr, lsl #24
10: 0000001c andeq r0, r0, ip, lsl r0
14: 00000000 andeq r0, r0, r0
18: 0001003c andeq r0, r1, ip, lsr r0
1c: 00000058 andeq r0, r0, r8, asr r0
20: 8b040e42 blhi 103930 <stack_top+0xf2810>
24: 0b0d4201 bleq 350830 <stack_top+0x33f710>
28: 420d0d64 andmi r0, sp, #100, 26 ; 0x1900
2c: 00000ecb andeq r0, r0, fp, asr #29
30: 00000020 andeq r0, r0, r0, lsr #32
34: 00000000 andeq r0, r0, r0
38: 00010094 muleq r1, r4, r0
3c: 00000084 andeq r0, r0, r4, lsl #1
40: 8b080e42 blhi 203950 <stack_top+0x1f2830>
44: 42018e02 andmi r8, r1, #2, 28
48: 78040b0c stmdavc r4, {r2, r3, r8, r9, fp}
4c: 42080d0c andmi r0, r8, #12, 26 ; 0x300
50: 000ecbce andeq ip, lr, lr, asr #23
|
|