rocketchip高级参数化机制--必看--终极Config调试实验（12）
完全模拟rocket chip设计中参数配置代码：/**
* @Author Joe_Liang
* @Date 2021/10/21 8:21
* @Version 1.0
*/
//SubSystemConfig.scala 总配置
class SubSystemConfig extends Config(
new MyConfig ++
new JtagConfig ++
new CacheConfig
)
//MyModule.scala文件
class MyConfig extends Config((v1,v2,v3)=>{
case BUSWIDTH => 32
case CHIPNAME => "RISC-V"
})
class MyModule(implicit p: Parameters) {
val buswidth:Int = p(BUSWIDTH)
val chipname:String = p(CHIPNAME)
println(buswidth)
println(chipname)
}
//JtagModule.scala文件
case object JtagBUSWIDTH extends Field
class JtagConfig extends Config((site,here,up) => {
case BUSWIDTH => 10
case JtagBUSWIDTH => 2 * here(BUSWIDTH)
})
class JtagModule (implicit p: Parameters){
val jtagbuswidth = p(JtagBUSWIDTH)
println("JtagModule:jtagbuswidth " + jtagbuswidth)
}
//CacheModule.scala文件
case object BUSWIDTH extends Field
case object CHIPNAME extends Field
case object IDECODERBUSWIDTH extends Field
class CacheConfig extends Config((site,here,up) => {
case BUSWIDTH => 64
case CHIPNAME => "RISC-V64"
case IDECODERBUSWIDTH => site(CHIPNAME) match {
case "RISC-V64" => 164
case _ => 32
}
})
class CacheModule(implicit p: Parameters){
val buswidth:Int = p(BUSWIDTH)
val name = p(CHIPNAME)
println("CacheModule " + buswidth)
println("CacheModule " + name)
val mymodule = new MyModule{p.alterPartial({
case BUSWIDTH => 16
case CHIPNAME => "RISC-V16"
})}
println("mymodule " + mymodule.buswidth)
println("mymodule " + mymodule.chipname)
val np = p.alter((site,here,up) => {
case IDECODERBUSWIDTH => 1285
})
val idecoder = new IDecoderModule{np}
}
//IDecoderModule.scala文件
class IDecoderModule(implicit p: Parameters) {
val decoderbuswidth :Int= p(IDECODERBUSWIDTH)
val name = p(CHIPNAME)
val buswidth:Int = p(BUSWIDTH)
val myidecoderherewidth = 20 * buswidth
println("IDecoderModule:decoderbuswidth " + decoderbuswidth)
println("IDecoderModule:name " + name)
println("IDecoderModule:myidecoderherewidth " + decoderbuswidth)
}
//MainStart.scala文件
object MainStart {
def main(args: Array): Unit = {
implicit val sysconfig = new SubSystemConfig
val jm = new JtagModule()
val idm = new IDecoderModule()
val cm2 = new CacheModule()
}
}
实验显示如下：
JtagModule:jtagbuswidth 20
IDecoderModule:decoderbuswidth 32
IDecoderModule:name RISC-V
IDecoderModule:myidecoderherewidth 32
CacheModule 32
CacheModule RISC-V
32
RISC-V
mymodule 32
mymodule RISC-V
IDecoderModule:decoderbuswidth 32
IDecoderModule:name RISC-V
IDecoderModule:myidecoderherewidth 32
如何CacheModule.scala中修改如下：
class CacheConfig extends Config((site,here,up) => {
case BUSWIDTH => 64
case CHIPNAME => "RISC-V64"
case IDECODERBUSWIDTH => here(CHIPNAME) match {
case "RISC-V64" => 164
case _ => 32
}
})
其它所有代码都不变，则显示如下：
JtagModule:jtagbuswidth 20
IDecoderModule:decoderbuswidth 164
IDecoderModule:name RISC-V
IDecoderModule:myidecoderherewidth 164
CacheModule 32
CacheModule RISC-V
32
RISC-V
mymodule 32
mymodule RISC-V
IDecoderModule:decoderbuswidth 164
IDecoderModule:name RISC-V
IDecoderModule:myidecoderherewidth 164
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